DocumentCode :
84515
Title :
PC-DUOS+: A TCAM Architecture for Packet Classifiers
Author :
Banerjee, Taposh ; Sahni, Shashank ; Seetharaman, Guna
Author_Institution :
Dept. of Comput. & Inf. Sci. & Eng., Univ. of Florida, Gainesville, FL, USA
Volume :
63
Issue :
6
fYear :
2014
fDate :
Jun-14
Firstpage :
1527
Lastpage :
1540
Abstract :
We propose algorithms for distributing the classifier rules to two ternary content addressable memories (TCAMs) and for incrementally updating the TCAMs. The performance of our scheme is compared against the prevalent scheme of storing classifier rules in a single TCAM in priority order. Our scheme results in an improvement in average lookup speed by up to 49% and an improvement in update performance by up to 3.84 times in terms of the number of TCAM writes.
Keywords :
content-addressable storage; memory architecture; pattern classification; PC-DUOS+; TCAM architecture; classifier rules distribution; packet classifiers; ternary content addressable memories; Computer architecture; Encoding; Indexes; Protocols; Random access memory; Throughput; Packet classifiers; ternary content addressable memories (TCAMs); updates;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.2012.287
Filename :
6374612
Link To Document :
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