Fully integrated CMOS fractional-N frequency divider for wide-band mobile applications with spurs reduction

Author

Boon, C.C. ; Do, M.A. ; Yeo, K.S. ; Ma, J.-G.

Author_Institution

Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore

Volume

52

Issue

6

fYear

2005

fDate

6/1/2005 12:00:00 AM

Firstpage

1042

Lastpage

1048

Abstract

A spurs reduction fractional-N frequency divider with a frequency range which is 3.5 times larger than that of a conventional fractional-N divider is presented in this paper. A 1.2-GHz quadrature voltage-controlled oscillator (VCO) is designed as the input source of the frequency divider. The circuit was fabricated using the 0.25-μm CMOS technology. The power consumption of the frequency divider and the quadrature VCO are 3 and 6 mW, respectively, at a 2-V supply.

Keywords

CMOS integrated circuits; broadband networks; frequency dividers; frequency synthesizers; mobile communication; voltage-controlled oscillators; 0.25 micron; 1.2 GHz; 2 V; 3 mW; 6 mW; CMOS technology; frequency divider; frequency synthesizer; power consumption; quadrature voltage-controlled oscillator; spurs reduction; wide-band mobile applications; CMOS technology; Charge pumps; Circuits; Frequency conversion; Frequency synthesizers; Multiaccess communication; Personal communication networks; Phase locked loops; Voltage-controlled oscillators; Wideband; CMOS oscillator; fractional-; quadrature oscillator;

fLanguage

English

Journal_Title

Circuits and Systems I: Regular Papers, IEEE Transactions on

Publisher

ieee

ISSN

1549-8328

Type

jour

DOI

10.1109/TCSI.2005.849124

Filename

1440627