• DocumentCode
    846152
  • Title

    LSQ: a power efficient and scalable implementation

  • Author

    Castro, F. ; Chaver, D. ; Pinuel, L. ; Prieto, M. ; Huang, M.C. ; Tirado, F.

  • Author_Institution
    Dept. Arquitectura de Computadores y Autom., Complutense Ciudad Univ., Madrid
  • Volume
    153
  • Issue
    6
  • fYear
    2006
  • Firstpage
    389
  • Lastpage
    398
  • Abstract
    The load-store queue (LSQ) of modern superscalar processors is a critical and non-scalable component responsible for keeping the order of memory operations. As new architectures become more aggressive, the number of in-flight memory instructions increases, and the LSQ must satisfy higher capacity requirements. An efficient LSQ state filtering mechanism based on Bloom filtering is proposed, which, in conjunction with a dynamic or profiling-based predictor, provides significant energy reduction (up to 55% in the LSQ and 4% in the whole processor), and only incurs a small performance loss
  • Keywords
    cache storage; content-addressable storage; power aware computing; Bloom filtering; LSQ state filtering mechanism; in-flight memory instructions; load-store queue; memory operations; power efficient scalable implementation; profiling-based predictor; superscalar processors;
  • fLanguage
    English
  • Journal_Title
    Computers and Digital Techniques, IEE Proceedings -
  • Publisher
    iet
  • ISSN
    1350-2387
  • Type

    jour

  • Filename
    4020550