Title :
Safe design for TF-SOI power MOSFETs
Author :
Roig, J. ; Stefanov, E. ; Morancho, F.
Author_Institution :
Lab. d´´Analyse et d´´Archit. des Systemes, CNRS, Toulouse, France
Abstract :
The aim of the work reported is to establish new design restrictions for thin-film silicon-on-insulator (TF-SOI) power MOSFETs using an analytical closed form expression to obtain the electric field at the gate edge. When the gate oxide is extended above the drift region, this field becomes stronger, thus degrading device performance and reliability.
Keywords :
power MOSFET; semiconductor device models; silicon-on-insulator; thin film transistors; TF-SOI power MOSFET; analytical closed form expression; drift region; gate edge field; gate oxide; thin-film silicon-on-insulator power MOSFET;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20063220
