Comparison of SiO2 and HfO2/SiO2 gate stacks electrical behaviour at a nanometre scale with CAFM

The electrical behaviour of a SiO₂ gate layer and a HfO₂/SiO₂ gate stack are studied at the nanometre scale by means of CAFM. The leaky spot (LS) and breakdown (BD) spot sizes, the post BD current-voltage (I-V) characteristics and the topography features have been compared. LS of ∼600-700 nm² and BD sizes of 1000-3000 nm² are measured for the SiO₂ layer and the HfO₂/SiO₂ stack. Post BD I-V characteristics reveal that, for SiO₂, I-V curves are well grouped and CAFM compliance is always reached for V_gate<0.5 V. For the HfO₂/SiO₂ stack, I-V curves show very much dispersion, and the V_gate needed to reach the compliance is larger. Therefore, the high-k layer reduces the severity of the BD event. Even so, a few times the HfO₂/SiO₂ stack BD spots exhibit I-V characteristics as conductive as SiO₂ BD spots.