Reliability-Driven Gate Replication for Nanometer-Scale Digital Logic

Author

Chen, Chunhong

Author_Institution

Dept. of Electr.& Comput. Eng., Windsor Univ., Ont.

Volume

6

Issue

3

fYear

2007

fDate

5/1/2007 12:00:00 AM

Firstpage

303

Lastpage

308

Abstract

To make digital circuits with unreliable devices more reliable has been a design challenge, especially for today´s nanometer-scale technologies. In this paper, we discuss gate replication architecture towards increasing the reliability of individual logic gates. While this architecture is similar to, and a special case of, conventional N-modular redundancy scheme, we provide more interpretation and extend it to the situation where N is an even integer by using threshold logic gate instead of majority voter. We also study the reliability models for generic gates with single-electron tunneling (SET) technology. Both analysis and numerical evaluation suggest that while more redundancy leads to higher reliability in general, the improvement rate depends on individual gate failure rates

Keywords

logic gates; nanoelectronics; reliability; semiconductor device models; single electron devices; SET; logic gates; nanometer-scale digital logic circuits; reliability models; reliability-driven gate replication architecture; single-electron tunneling technology; Digital circuits; Failure analysis; Integrated circuit reliability; Logic circuits; Logic design; Logic devices; Logic gates; Nanoscale devices; Redundancy; Tunneling; Digital logic; gate replication; redundancy; reliability; single-electron tunneling (SET);

fLanguage

English

Journal_Title

Nanotechnology, IEEE Transactions on

Publisher

ieee

ISSN

1536-125X

Type

jour

DOI

10.1109/TNANO.2007.891066

Filename

4200722