Title :
Novel CMOS sampled-data VLSI implementation of artificial neural networks
Author :
Rehan, S.E. ; Elmasry, M.I.
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
fDate :
6/18/1992 12:00:00 AM
Abstract :
A mixed-mode VLSI implementation of artificial neural networks offers a tradeoff solution for speed, area saving, and flexibility. A novel CMOS sampled-data programmable synapse and a simple CMOS analogue neuron have been developed. Using a 1.2 mu m CMOS technology, the synapse consumed 120*120 mu m2 and the neuron consumed 120*260 mu m2.
Keywords :
CMOS integrated circuits; VLSI; neural nets; 1.2 micron; CMOS analogue neuron; CMOS technology; artificial neural networks; mixed analog/digital IC; mixed-mode VLSI implementation; programmable synapse; sampled-data VLSI;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19920768
