• DocumentCode
    847569
  • Title

    Novel CMOS sampled-data VLSI implementation of artificial neural networks

  • Author

    Rehan, S.E. ; Elmasry, M.I.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
  • Volume
    28
  • Issue
    13
  • fYear
    1992
  • fDate
    6/18/1992 12:00:00 AM
  • Firstpage
    1216
  • Lastpage
    1218
  • Abstract
    A mixed-mode VLSI implementation of artificial neural networks offers a tradeoff solution for speed, area saving, and flexibility. A novel CMOS sampled-data programmable synapse and a simple CMOS analogue neuron have been developed. Using a 1.2 mu m CMOS technology, the synapse consumed 120*120 mu m2 and the neuron consumed 120*260 mu m2.
  • Keywords
    CMOS integrated circuits; VLSI; neural nets; 1.2 micron; CMOS analogue neuron; CMOS technology; artificial neural networks; mixed analog/digital IC; mixed-mode VLSI implementation; programmable synapse; sampled-data VLSI;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19920768
  • Filename
    144344
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=847569