• DocumentCode
    848522
  • Title

    Small offset-voltage In/sub 0.49/Ga/sub 0.51/P/GaAs double-barrier bipolar transistor

  • Author

    Wu, C.C. ; Lu, S.S.

  • Author_Institution
    Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • Volume
    13
  • Issue
    8
  • fYear
    1992
  • Firstpage
    418
  • Lastpage
    420
  • Abstract
    In/sub 0.49/Ga/sub 0.51/P/GaAs double-barrier bipolar transistors (DBBTs) grown by gas-source molecular beam epitaxy (GSMBE) have been fabricated and measured. This structure has two InGaP barrier layers (100 AA in thickness): one is inserted between the emitter-base (e-b) junction and the other between the base-collector (b-c) junction. An offset voltage of 26 mV and a differential current gain of 120 at room temperature were obtained with a heavily doped p/sup +/ (2*10/sup 19/ cm/sup -3/) base (500 AA in thickness). The small offset voltage was attributed to the similar structure of the e-b and b-c junctions and to the suppression of the hole injection current into the collector by the InGaP hole barrier at the b-c junction.<>
  • Keywords
    III-V semiconductors; bipolar transistors; chemical beam epitaxial growth; gallium arsenide; gallium compounds; indium compounds; semiconductor growth; tunnelling; 26 mV; In/sub 0.49/Ga/sub 0.51/P-GaAs; InGaP barrier layers; base collector junction; differential current gain; double-barrier bipolar transistor; emitter base junction; gas-source molecular beam epitaxy; hole injection current suppression; offset voltage; Bipolar transistors; Councils; Gallium arsenide; Geometry; Heterojunction bipolar transistors; Molecular beam epitaxial growth; Substrates; Temperature; Tunneling; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/55.192777
  • Filename
    192777