Title :
A 150-V multiple up-drain VDMOS, CMOS, and bipolar process in ´direct-bonded´ silicon on insulator on silicon
Author :
Ifstrom, T. ; Apel, U. ; Graf, H.G. ; Harendt, C. ; Hofflinger, B.
Author_Institution :
Inst. fuer Mikroelektronik Stuttgart, Germany
Abstract :
Silicon on insulator on silicon (SOIS) has been produced with silicon direct bonding (SDB). Within a silicon film of 15- mu m thickness, islands with ubiquitous oxide isolation have been formed for the simultaneous integration of 150-V power VDMOS transistors, CMOS circuits in a channelless sea-of-gates array with 2- mu m gates, and bipolar transistors. The up-drain VDMOS transistors with 2- Omega -mm/sup 2/ specific on-resistance allow multiple isolated outputs, so high-voltage push-pull drivers can be fabricated in a single chip. The bipolar transistors are comparable to those of a 60-V standard process with vertical n-p-n and lateral p-n-p current gains of 80.<>
Keywords :
BIMOS integrated circuits; bipolar transistors; insulated gate field effect transistors; integrated circuit technology; power integrated circuits; semiconductor-insulator-semiconductor structures; 150 V; CMOS circuits; SOIS; Si-SiO/sub 2/-Si; bipolar transistors; channelless sea-of-gates array; high-voltage push-pull drivers; lateral p-n-p current gains; multiple isolated outputs; oxide isolation; power VDMOS transistors; silicon direct bonding; up-drain VDMOS transistors; vertical n-p-n current gain; Bipolar transistor circuits; Bipolar transistors; CMOS process; Dielectrics; Insulation; MOS devices; Semiconductor films; Silicon on insulator technology; Threshold voltage; Wafer bonding;
Journal_Title :
Electron Device Letters, IEEE
