Title :
Ultrashallow junctions for ULSI using As/sub 2//sup +/ implantation and rapid thermal anneal
Author :
Park, Byung G. ; Bokor, Jeffrey ; Luftman, H.S. ; Rafferty, Conor S. ; Pinto, M.R.
Author_Institution :
AT&T Bell Lab., Murray Hill, NJ, USA
Abstract :
Using As/sub 2//sup +/ ion implantation and rapid thermal anneal, 40-nm n/sup +/-p junctions are realized. The junction formed with p/sup -/ substrate shows very low leakage current (<0.5 nA/cm/sup 2/) up to 2-V reverse bias. The introduction of a heavily doped (10/sup 18/ cm/sup -3/ level) p region generates a significantly higher leakage current due to the onset of band-to-band tunneling. Using varied geometry devices with a given area, the major tunneling current is shown to be confined in the perimeter of the device, and a method to suppress this leakage is suggested.<>
Keywords :
VLSI; annealing; ion implantation; leakage currents; p-n homojunctions; 2 V; 40 nm; RTA; Si:As; ULSI; band-to-band tunneling; device perimeter; ion implantation; leakage current; leakage suppression; rapid thermal anneal; reverse bias; tunneling current; ultrashallow junctions; varied geometry devices; Diodes; Doping; Electric variables; Fabrication; Ion implantation; Leakage current; MOSFET circuits; Rapid thermal annealing; Tunneling; Ultra large scale integration;
Journal_Title :
Electron Device Letters, IEEE
