Low-conductance drain (LCD) design of InAlAs/InGaAs/InP HEMT´s

Author

Pao, Yi-ching ; Harris, James S., Jr.

Author_Institution

Litton Solid State Div., Santa Clara, CA, USA

Volume

13

Issue

10

fYear

1992

Firstpage

535

Lastpage

537

Abstract

The concepts of the low-conductance drain (LCD) design approach for lattice-matched InAlAs/InGaAs/InP HEMTs are demonstrated for improved device performance. The tradeoff for LCD HEMT characteristics is a tapered current gain cutoff frequency f/sub t/ under high drain-to-source bias. This behavior is, in principle, due to the fact that the LCD approach increases the effective gate length of the HEMTs in exchange for reduced peak channel electric field. Two-dimensional PISCES simulation was used to optimize the improvements while simultaneously minimizing this undesirable effect for an LCD HEMT structure.<>

Keywords

III-V semiconductors; aluminium compounds; gallium arsenide; high electron mobility transistors; indium compounds; solid-state microwave devices; 2D PISCES simulation; InAlAs-InGaAs-InP; LCD HEMT structure; current gain cutoff frequency; device performance; drain-to-source bias; effective gate length; lattice matched HEMTs; low-conductance drain; reduced peak channel electric field; semiconductors; tradeoff; Capacitance; Cutoff frequency; HEMTs; Indium compounds; Indium gallium arsenide; Indium phosphide; Microwave devices; Output feedback; Performance gain; Solid state circuits;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.192824

Filename

192824