DocumentCode
84920
Title
Specifications of Nanoscale Devices and Circuits for Neuromorphic Computational Systems
Author
Rajendran, Bipin ; Liu, Yong ; Seo, Jae-sun ; Gopalakrishnan, Kailash ; Chang, Leland ; Friedman, Daniel J. ; Ritter, Mark B.
Author_Institution
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Volume
60
Issue
1
fYear
2013
fDate
Jan. 2013
Firstpage
246
Lastpage
253
Abstract
The goal of neuromorphic engineering is to build electronic systems that mimic the ability of the brain to perform fuzzy, fault-tolerant, and stochastic computation, without sacrificing either its space or power efficiency. In this paper, we determine the operating characteristics of novel nanoscale devices that could be used to fabricate such systems. We also compare the performance metrics of a million neuron learning system based on these nanoscale devices with an equivalent implementation that is entirely based on end-of-scaling digital CMOS technology and determine the technology targets to be satisfied by these new devices. We show that neuromorphic systems based on new nanoscale devices can potentially improve density and power consumption by at least a factor of 10, as compared with conventional CMOS implementations.
Keywords
nanoelectronics; stochastic processes; electronic system; end-of-scaling digital CMOS technology; fault-tolerant computation; fuzzy computation; million neuron learning system; nanoscale circuit; nanoscale device; neuromorphic computational system; neuromorphic engineering; stochastic computation; CMOS integrated circuits; MIMICs; Nanoscale devices; Nerve fibers; Programming; Random access memory; CMOS; hybrid integrated circuits; neural network hardware; resistive random access memory (RRAM);
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2012.2227969
Filename
6374663
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