DocumentCode
84961
Title
Hardware Implementation of an Automatic Adaptive Centralized Underfrequency Load Shedding Scheme
Author
AbdElwahid, Sarra ; Babiker, Abubakr ; Eltom, Ahmed ; Kobet, Gary
Author_Institution
Univ. of Tennessee at Chattanooga, Chattanooga, TN, USA
Volume
29
Issue
6
fYear
2014
fDate
Dec. 2014
Firstpage
2664
Lastpage
2673
Abstract
The underfrequency load shedding (UFLS) mostly used in industry is a decentralized deterministic scheme designed to shed a prespecified amount of load after a predetermined time delay. It sheds the same amount of load from the same location irrespective of how fast the frequency drops and without consideration of the disturbance location or dip in bus voltage. Recent studies focused on adaptive UFLS, but these studies are still based on software simulation. This study presents an implementation of a real-time centralized adaptive UFLS scheme using industry-grade hardware. It estimates the amount of load to be shed based on the rate of frequency decline and distributes the load to be shed among the load buses based on the voltage dip at these buses. The UFLS in this study is implemented using a real-time digital simulator, phasor measurement units embedded in the relays, a global positioning system clock, and a synchrophasor vector processor. The load is modelled as a mixture of dynamic and static load. The implemented scheme restored the system frequency and voltage. The results emphasize its adaptability and suitability for implementation in industry.
Keywords
busbars; clocks; delays; digital simulation; load distribution; load shedding; phasor measurement; relays; automatic adaptive centralized underfrequency load shedding scheme; bus voltage dip; decentralized deterministic scheme; dynamic load; frequency decline rate; frequency drop; global positioning system clock; industry-grade hardware implementation; load bus; load distribution; phasor measurement unit; real-time centralized adaptive UFLS scheme; real-time digital simulator; relay; software simulation; static load; synchrophasor vector processor; time delay; Generators; Load modeling; Mathematical model; Phasor measurement units; Power system stability; Real-time systems; Relays; Phasor measurement units (PMUs); real-time digital simulator (RTDS); synchrophasor vector processor (SVP); underfrequency load shedding (UFLS); voltage dip;
fLanguage
English
Journal_Title
Power Delivery, IEEE Transactions on
Publisher
ieee
ISSN
0885-8977
Type
jour
DOI
10.1109/TPWRD.2014.2331495
Filename
6850098
Link To Document