DocumentCode
850812
Title
State-of-the-Art Review: Hardness of MOS and Bipolar Integrated Circuits
Author
Long, David M.
Author_Institution
Science Applications, Inc. La Jolla, California 92037
Volume
27
Issue
6
fYear
1980
Firstpage
1673
Lastpage
1679
Abstract
The rapid changes which have been occurring in integrated circuit technologies in recent years have been accompanied by changes in the radiation hardness. This paper reviews the state-of-the-art hardness levels obtainable in silicon MOS and Bipolar technologies. Neutron hardness ranges from 3Ã1013 n/cm2 for I2 L to more than 1Ã1015 n/cm2 for ECL. Total dose hardness ranges from 700 Rads for unhardened NMOS to more than 1 Megarad for bipolar technologies. Transient upset levels for short radiation pulses range from 3Ã106 Rad (si)/sec for NMOS to 5Ã109 Rad (si)/sec for CMOS/SOS. Latchup can occur as low as 1.4 Rads for CMOS LSI, though it has been shown to be preventable in 4000 series CMOS by using neutron irradiation to reduce the carrier lifetime. Continued hardening R&D programs are necessary to retain or improve the hardness in future VLSI technologies.
Keywords
Bipolar integrated circuits; CMOS technology; Charge carrier lifetime; Integrated circuit technology; Large scale integration; MOS devices; Neutrons; Radiation hardening; Research and development; Silicon;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1980.4331087
Filename
4331087
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