• DocumentCode
    85136
  • Title

    FEATS: Framework for Explorative Analog Topology Synthesis

  • Author

    Meissner, Markus ; Hedrich, Lars

  • Author_Institution
    Inst. for Comput. Sci., Goethe Univ. Frankfurt, Frankfurt am Main, Germany
  • Volume
    34
  • Issue
    2
  • fYear
    2015
  • fDate
    Feb. 2015
  • Firstpage
    213
  • Lastpage
    226
  • Abstract
    This paper proposes a new methodology for automated analog circuit synthesis, aiming to address the challenges known from other analog synthesis approaches: unsatisfactory time predictability due to stochastic-driven circuit generation methods, the dereliction of the creative part during the design process, and the inflexibility leading to synthesis tools, which mostly only handle just one circuit class. This contribution presents the underlying concepts and ideas to provide the predictability, flexibility, and creative freedom in order to elevate analog circuit design to the next step. A circuit generation algorithm is presented, which allows a full design-space exploration. Furthermore, an isomorphism algorithm is developed, which reduces a given set of circuits to its unique being one of the first methodologies addressing this issue. Thus, the algorithm handles vast amounts of circuits in a very efficient manner. The results demonstrate the claimed feasibility and applicability of the synthesis framework in general and in the context of system design.
  • Keywords
    analogue circuits; network synthesis; FEATS; analog circuit design; analog synthesis approaches; automated analog circuit synthesis; circuit generation algorithm; design-space exploration; framework for explorative analog topology synthesis; isomorphism algorithm; stochastic-driven circuit generation methods; Abstracts; Algorithm design and analysis; Analog circuits; Engines; Libraries; Ports (Computers); Topology; Design for space exploration; Symmetry detection; Synthesis; design for space exploration; performance optimization; symbolic techniques; symmetry detection; synthesis;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2014.2376987
  • Filename
    6980087