• DocumentCode
    852029
  • Title

    A Fault-Tolerant Multi-Processor without Bottlenecks

  • Author

    Manner, R. ; de Luigi, B.

  • Author_Institution
    Physikalisches Institut der Universitÿt Philosophenweg 12 D-6900 Heidelberg
  • Volume
    28
  • Issue
    1
  • fYear
    1981
  • Firstpage
    390
  • Lastpage
    394
  • Abstract
    The Heidelberg Multi-Processor-System "POLYP" is described. It will be used for online-data reduction, trigger processing, image processing asf. The system consists of typically up to 300 processor-modules and several global memory modules. They are interconnected by a multi-common-bus for parallel data transfers and a multiple synchronization bus for processor/task-scheduling. Hardware and software is designed to be free of bottle-necks: the number of modules and the bus-capacity are not limited. An increased system size does not lead to increased memory- or bus-interferences. The system is designed to be fault-tolerant: hardware and sofware are organized totally dezentralized; most temporary and permanent memory- and bus-transfer-faults are corrected by hardware. Defective modules or busses are disabled by software; the system continues its operation with almost the same speed.
  • Keywords
    Computer architecture; Costs; Fault tolerance; Fault tolerant systems; Hardware; Image processing; Pattern matching; Physics computing; Software design; Software systems;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.1981.4331204
  • Filename
    4331204