Verilog-A Based Effective Complementary Resistive Switch Model for Simulations and Analysis

Resistive memory, also known as memristor, is recently emerging as a potential successor to traditional charge-based memories. However, the nanoscale features of these devices introduce challenges in modeling and simulation. In this paper, we propose a novel Verilog-A based complementary resistive switch memory model for effective simulation and analysis. Our proposed model captures desired nonlinear characteristics using voltage based state control as opposed to recently proposed current based state control. We demonstrate that such state control has advantages for our proposed CRS model based crossbar arrays in terms of symmetric ON/OFF voltages and significantly reduced sneak path currents with high noise margin compared to traditional memristor based architectures. Moreover, to validate the effectiveness of our Verilog-A based model we carry out extensive simulations and analyses for different crossbar array architectures using traditional EDA tools.