DocumentCode :
852146
Title :
Implementation issues of 2-dimensional polynomial multipliers for signal processing using residue arithmetic
Author :
Skavantzos, A. ; Mitash, N.
Author_Institution :
Dept. of Electr. & Comput. Eng., Louisiana State Univ., Baton Rouge, LA, USA
Volume :
140
Issue :
1
fYear :
1993
fDate :
1/1/1993 12:00:00 AM
Firstpage :
45
Lastpage :
53
Abstract :
The residue number system (RNS) has been considered a useful tool for digital signal processing (DSP) since it can support parallel, carry-free, high-speed arithmetic. The polynomial residue number system (PRNS) enjoys all the RNS advantages and is capable of performing the useful DSP operation of polynomial multiplication in a totally parallel fashion and with minimum multiplication count provided that an appropriate modular arithmetic ring is chosen. However, the PRNS has one limitation: that is the size of the ring used for the arithmetic is proportional to the size of the polynomials to be multiplied. As a result, to multiply large polynomials in a fixed-size arithmetic ring, one must involve two-dimensional PRNS techniques. The authors describe these two-dimensional PRNS techniques and offer array implementations of two-dimensional PRNS polynomial multipliers. The proposed arrays are modular and pipelinable, and thus suitable for VLSI implementations.
Keywords :
digital arithmetic; multiplying circuits; polynomials; 2D PRNS polynomial multipliers; digital signal processing; fixed-size arithmetic ring; modular arithmetic ring; pipelinable; polynomial multiplication; polynomial residue number system; residue arithmetic; residue number system; two-dimensional PRNS polynomial multipliers;
fLanguage :
English
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E
Publisher :
iet
ISSN :
0143-7062
Type :
jour
Filename :
193775
Link To Document :
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