• DocumentCode
    852439
  • Title

    Low Noise Charge Sensitive Amplifier with Low Input Impedance

  • Author

    Freytag, Dieter

  • Author_Institution
    Stanford Linear Accelerator Center Stanford University, Stanford, California 94305
  • Volume
    28
  • Issue
    1
  • fYear
    1981
  • Firstpage
    595
  • Lastpage
    597
  • Abstract
    This amplifier was designed for use in a large array of proportional wire chambers with charge division readout and for cathode readout of proportional chambers. The single stage high gain (104) amplifier with FET input has low component count, low cost, and a high packing density of 32 channels per double-sided P. C. board. Edge connectors are used for input, output, power and calibration signals. The on-board calibration system drives two independent groups of amplifiers through a range which is proportional to a distributed DC level over 3 orders of magnitude. The input and output signals are differentially driven for optimum noise rejection and interchannel isolation.
  • Keywords
    Calibration; Cathodes; Connectors; Costs; Distributed amplifiers; Drives; FETs; Impedance; Low-noise amplifiers; Wire;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.1981.4331245
  • Filename
    4331245