Author_Institution :
Dept. of Comput. Eng. & Sci., Yuan Ze Univ., Chung-li, Taiwan
Abstract :
Theorem 2 of the title paper (A.B. Kahng et al., ibid. vol. 18, pp.445-462, 1999) presents layout density bounds for any fixed r-dissection w-by-w window given the layout density of at least L and at most U for all w-by-w windows whose bottom left corners are at points (i(w/r), j(w/r)), i, j=0, 1, ..., r((n/w)-1) on an n-by-n layout plane. However, the bounds are not tight for certain combinations of U (L) and r. Here, the authors present an approach to obtaining the tight lower and upper bounds for all possible combinations of U (L) and r.
Keywords :
VLSI; chemical mechanical polishing; circuit layout CAD; design for manufacture; integrated circuit layout; chemical-mechanical polishing; design for manufacturability; dummy features; extremal-layout-density analysis; filling algorithms; layout density bounds; lower bounds; tight bounds; tiling; upper bounds; very large scale integration design; Algorithm design and analysis; Chemical analysis; Chemical processes; Filling; Manufacturing; Nonhomogeneous media; Pattern analysis; Planarization; Upper bound; Very large scale integration;