Title :
Variability-insensitive scheme for NAND flash memory interfaces
Author :
Son, C.-I. ; Yoon, S. ; Chung, S.W. ; Park, C.-I. ; Chung, E.-Y.
Author_Institution :
Sch. of Electr. & Electron. Eng., Yonsei Univ., Seoul
Abstract :
A novel NAND flash memory interface (NFMI) scheme to cope with uncertainty due to process, voltage and temperature (PVT) variations is proposed. The new NFMI scheme introduces a signal called data valid strobe to replace the signal read enable bar, which is a read strobe in the standard NFMI protocol. Experimental results show that the proposed scheme is insensitive to PVT variations, unlike the existing NFMI scheme, and hence substantially increases system performance as well as reliability
Keywords :
NAND circuits; flash memories; system buses; NAND flash memory interfaces; data valid strobe; process variation; read strobe; temperature variations; variability-insensitive scheme; voltage variation;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20062239
