Title :
Improved clock buffer with high PSRR for SC circuit applications
Author :
VanPeteghem, P.M.
Author_Institution :
Texas A&M Univ., College Station, TX, USA
Abstract :
Clock feedthrough in SC circuits results in low PSRR figures, incompatible with high-performance signal processing. A high-PSRR CMOS clock buffer is presented here, which blocks this power supply (PS) noise coupling path. The presented circuit is a significant improvement over an earlier circuit proposed by the same author, but having a PSRR of over 40 dB now.
Keywords :
CMOS integrated circuits; buffer circuits; clocks; switched capacitor networks; PSRR figures; SC circuits; clock buffer; high-PSRR CMOS clock buffer; signal processing;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19890011
