DocumentCode :
859605
Title :
Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage
Author :
Tschanz, James W. ; Kao, James T. ; Narendra, Siva G. ; Nair, Raj ; Antoniadis, Dimitri A. ; Chandrakasan, Anantha P. ; De, Vivek
Author_Institution :
Intel Labs., Intel Corp., Hillsboro, OR, USA
Volume :
37
Issue :
11
fYear :
2002
fDate :
11/1/2002 12:00:00 AM
Firstpage :
1396
Lastpage :
1402
Abstract :
Bidirectional adaptive body bias (ABB) is used to compensate for die-to-die parameter variations by applying an optimum pMOS and nMOS body bias voltage to each die which maximizes the die frequency subject to a power constraint. Measurements on a 150 nm CMOS test chip which incorporates on-chip ABB, show that ABB reduces variation in die frequency by a factor of seven, while improving the die acceptance rate. An enhancement of this technique, that compensates for within-die parameter variations as well, increases the number of dies accepted in the highest frequency bin. ABB is therefore shown to provide bin split improvement in the presence of increasing process parameter variations.
Keywords :
CMOS digital integrated circuits; VLSI; compensation; leakage currents; low-power electronics; microprocessor chips; 150 nm; CMOS digital ICs; bidirectional adaptive body bias; bin split improvement; compensation; die acceptance rate; die frequency; die-to-die parameter variations; low-power circuits; microprocessor frequency; microprocessor leakage; optimum nMOS body bias voltage; optimum pMOS body bias voltage; power constraint; within-die parameter variations; CMOS digital integrated circuits; Clocks; Costs; Energy consumption; Frequency measurement; MOS devices; Microprocessors; Process design; Testing; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2002.803949
Filename :
1046081
Link To Document :
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