DocumentCode
859623
Title
A software methodology for detecting hardware faults in VLIW data paths
Author
Bolchini, Cristiana
Author_Institution
Dipt. di Elettronica e Informazione, Politecnico di Milano, Italy
Volume
52
Issue
4
fYear
2003
Firstpage
458
Lastpage
468
Abstract
The proposed methodology aims to achieve processor data paths for VLIW architectures able to autonomously detect transient and permanent hardware faults while executing their applications. The approach, carried out on the compiled application software, provides the introduction of additional instructions for controlling the correctness of the computation with respect to failures in one of the data path functional units. The advantage of a software approach to hardware fault detection is interesting because it allows one to apply it only to the critical applications executed on the VLIW architecture, thus not causing a delay in the execution of noncritical tasks. Furthermore, by exploiting the intrinsic redundancy of this class of architectures no hardware modification is required on the data path so that no processor customization is necessary.
Keywords
data flow computing; error detection; fault diagnosis; fault tolerant computing; instruction sets; multiprocessing systems; parallel architectures; parallel machines; redundancy; VLIW data path; VLIW processor architecture; compiled application software; hardware fault detection; noncritical task execution delay; processor customization; software duplication; Application software; Built-in self-test; Computer aided instruction; Computer architecture; Delay; Fault detection; Fault tolerance; Hardware; Redundancy; VLIW;
fLanguage
English
Journal_Title
Reliability, IEEE Transactions on
Publisher
ieee
ISSN
0018-9529
Type
jour
DOI
10.1109/TR.2003.821935
Filename
1260596
Link To Document