Title :
A novel vertical bottom-gate polysilicon thin film transistor with self-aligned offset
Author :
Lai, Chao Sung ; Lee, Chung Len ; Lei, Tan Fu ; Chern, Horng Nan
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fDate :
5/1/1996 12:00:00 AM
Abstract :
A novel device structure for the vertical bottom polysilicon gate thin film transistor (TFT) with a self-align offset drain is proposed and demonstrated. The new VTFT allows a deep-submicron channel length, which is determined by the thickness of the active polysilicon film, not by the lithographic system resolution. The self-alignment offset drain reduces the leakage current, as a result, it exhibits good device performance.
Keywords :
MOSFET; elemental semiconductors; ion implantation; leakage currents; silicon; thin film transistors; MOS device; Si-SiO/sub 2/; active polysilicon film thickness; deep-submicron channel length; leakage current reduction; polysilicon thin film transistor; self-aligned offset drain; vertical bottom-gate TFT; Amorphous silicon; Annealing; Artificial intelligence; Chaos; Etching; Fabrication; Leakage current; Nitrogen; Surfaces; Thin film transistors;
Journal_Title :
Electron Device Letters, IEEE
