Title :
Scalable register file organisation for a multiple issue microprocessor
Author_Institution :
Comput. Syst. Lab., Hewlett-Packard Co., Palo Alto, CA
fDate :
3/28/1996 12:00:00 AM
Abstract :
The scalability of a register file as employed in microprocessors is investigated. Results are presented which show the dependence of the register file access time against the number of registers, and the number of ports. A new organisation which scales better in terms of cycle time is proposed
Keywords :
computer architecture; microprocessor chips; access time; cycle time; multiple issue microprocessor; scalability; scalable register file organisation;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19960435
