Title :
Thermal noise and bit error rate limits in nanoscale memories
Author :
Forbes, L. ; Mudrow, M. ; Wanalertlak, W.
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Oregon State Univ., Corvallis, OR, USA
fDate :
3/2/2006 12:00:00 AM
Abstract :
Analysis of the effects of thermal noise in nanoscale memories is presented. A theoretical analysis of thermal noise is used to predict the number of bit errors per year caused by thermal noise.
Keywords :
error statistics; integrated circuit noise; integrated memory circuits; nanoelectronics; thermal noise; BER; bit error rate limits; nanoscale memories; thermal noise;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20063803
