Implementation of novel "push-forward" RSFQ Carry-Save Serial Adders

We have developed a novel, so-called "push-forward" design approach in Rapid Single-Flux-Quantum (RSFQ) logic. This approach leads to a more efficient circuit design at the gate level using fewer Josephson junctions combined with reasonable circuit parameter margins. Other advantages include higher operational speed and smaller power dissipation. This novel method is based on a specific type of interaction (pushing forward) between single flux quanta already stored by RSFQ gates and newly arriving data SFQ pulses. It implies a reuse of an internal gate memory as well as realization of multi-quantum storage. Using this push-forward design approach, we have designed, optimized, fabricated, and successfully tested two versions of Carry-Save Serial Adders for digital signal processing applications.<>