DocumentCode
863010
Title
A FASTBUS Controller Module Using a MULTIBUS MPU
Author
Deiss, S.R.
Author_Institution
Stanford Linear Accelerator Center Stanford University, Stanford, California 94305
Volume
30
Issue
1
fYear
1983
Firstpage
216
Lastpage
219
Abstract
The architecture, adaptability and performance of SLAC´s single board controller module will be detailed. Example uses with an 8086 MPU and with a 68000 MPU will be given. Details of circuit design and software interface will be provided.
Keywords
Availability; Circuit synthesis; Computer architecture; Fastbus; Linear accelerators; Logic testing; Microcomputers; Microprocessors; Prototypes; Software performance;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1983.4332257
Filename
4332257
Link To Document