DocumentCode
863472
Title
How DEC developed Alpha
Author
Comerford, R.
Volume
29
Issue
7
fYear
1992
fDate
7/1/1992 12:00:00 AM
Firstpage
26
Lastpage
31
Abstract
A 64 bit architecture called Alpha, which is the basis of the fastest available commercial reduced-instruction-set computer (RISC) chip, is discussed. The development process is detailed. Alpha´s 25 year life expectancy envisions a 1000 fold performance increase to 400 billion instructions per second.<>
Keywords
reduced instruction set computing; 400 GIPS; 64 bit; Alpha; DEC; RISC; life expectancy; performance increase; reduced-instruction-set computer; Clocks; Computer aided software engineering; Computer architecture; Manufacturing; Microcomputers; Microprocessors; Open systems; Operating systems; Reduced instruction set computing; Voice mail;
fLanguage
English
Journal_Title
Spectrum, IEEE
Publisher
ieee
ISSN
0018-9235
Type
jour
DOI
10.1109/6.144508
Filename
144508
Link To Document