A 2-V 2.3/4.6-GHz dual-band frequency synthesizer in 0.35-μm digital CMOS process

Author

Chen, Wei-Zen ; Chang, Jia-Xian ; Hong, Ying-Jen ; Wong, Meng-Tzer ; Kuo, Chien-Liang

Author_Institution

Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsin-Chu, Taiwan

Volume

39

Issue

1

fYear

2004

Firstpage

234

Lastpage

237

Abstract

This brief describes the design of a frequency synthesizer for 2.3/4.6-GHz wireless applications in a 0.35-μm digital CMOS process. This synthesizer provides dual-band output signals by means of frequency doubling techniques. Output frequency of the proposed synthesizer ranges from 1.87-2.3 GHz, and 3.74-4.6GHz. This chip consumes a total power of 80 mW from a single 2-V supply, including 45 mW for dual-band output buffers. Core size is 2200 μm×1600 μm.

Keywords

CMOS digital integrated circuits; frequency multipliers; frequency synthesizers; integrated circuit design; phase locked loops; radiofrequency integrated circuits; voltage-controlled oscillators; 0.35 micron; 0.35-μm digital CMOS process; 1.87 to 2.3 GHz; 1600 micron; 2 V; 2.3 GHz; 2200 micron; 3.74 to 4.6 GHz; 4.6 GHz; 45 mW; 80 mW; PLL-based frequency synthesizer; VCO; dual-band frequency synthesizer; dual-band output buffers; dual-band output signals; frequency doubling techniques; single 2-V supply; wireless applications; CMOS process; Dual band; Frequency conversion; Frequency synthesizers; Local area networks; Phase frequency detector; Radio frequency; Transceivers; Tuning; Voltage-controlled oscillators;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2003.820878

Filename

1261306