Title :
Neuron MOS binary-logic integrated circuits. I. Design fundamentals and soft-hardware-logic circuit implementation
Author :
Shibata, Tadashi ; Ohmi, Tadahiro
Author_Institution :
Dept. of Electron. Eng., Tohoku Univ., Sendai, Japan
fDate :
3/1/1993 12:00:00 AM
Abstract :
Described are the fundamental design principles for binary-logic circuits using a highly functional device called the neuron MOS transistor (νMOS), a single MOS transistor simulating the function of biological neurons. To facilitate logic design employing this transistor, a graphical technique called the floating-gate potential diagram has been developed. It is shown that any Boolean functions can be generated using a common circuit configuration of two-stage νMOS inverters. One of the most striking features of νMOS binary-logic application is the realization of a so-called soft hardware logic circuit. The circuit can be made to represent any logic function (AND, OR, NAND, NOR, exclusive-NOR, exclusive-OR, etc.) by adjusting external control signals without any modifications in its hardware configuration. The circuit allows real-time reconfigurable systems to be built. Test circuits were fabricated by a double-polysilicon CMOS process and their operation was experimentally verified
Keywords :
CMOS integrated circuits; integrated logic circuits; neural nets; Boolean functions; any logic function; binary-logic circuits; common circuit configuration; design principles; double-polysilicon CMOS process; external control signals; floating-gate potential diagram; functional device; graphical technique; neuron MOS transistor; operation; real-time reconfigurable systems; single MOS transistor; soft-hardware-logic circuit implementation; two-stage νMOS inverters; Biological system modeling; Boolean functions; Circuit simulation; Circuit testing; Hardware; Inverters; Logic circuits; Logic design; MOSFETs; Neurons;
Journal_Title :
Electron Devices, IEEE Transactions on