Fully digital test solution for a set of ADCs and DACs embedded in a SIP or SOC

The trend towards highly-integrated electronic devices has lead to a growth of system-in-package and system-on-chip technologies, where data converters play a major role in the interface between the real analogue world and digital processing. Testing these converters with accuracy and at low cost represents a big challenge because the observability and controllability of these blocks is reduced and the test operation requires a lot of time and expensive analogue instruments. A new design-for-test technique called `analogue network of converters´ is presented. This technique aims at testing a set of analogue-to-digital converters and digital-to-analogue converters in a fully digital setup (using a low-cost digital tester). The proposed method relies on a novel processing of the harmonic distortion generated by the converters and requires an extremely simple additional circuitry and interconnects