Static power modeling of 32-bit microprocessors

Author

Brandolese, Carlo ; Salice, Fabio ; Fornaciari, William ; Sciuto, Donatella

Author_Institution

Dipt. di Elettronica e Inf., Politecnico di Milano, Italy

Volume

21

Issue

11

fYear

2002

fDate

11/1/2002 12:00:00 AM

Firstpage

1306

Lastpage

1316

Abstract

The paper presents a novel strategy aimed at modeling instruction energy consumption of 32-bit microprocessors. Different from former approaches, the proposed instruction-level power model is founded on a functional decomposition of the activities accomplished by a generic microprocessor. The proposed model has significant generalization capabilities. It allows estimation of the power figures of the entire instruction-set starting from the analysis of a subset, as well as to power characterize new processors by using the model obtained by considering other microprocessors. The model is formally presented and justified and its actual application over five commercial microprocessors is included. This static characterization is the basic information for system-level power modeling of hardware/software architectures.

Keywords

identification; integrated circuit modelling; low-power electronics; microprocessor chips; 32 bit; instruction energy consumption modeling; instruction-level power model; low-power design; microprocessors; static characterization; static power modeling; Application software; Costs; Embedded software; Energy consumption; Hardware; Helium; Microprocessors; Power system modeling; Software architecture; Time to market;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/TCAD.2002.804104

Filename

1047049