• DocumentCode
    864731
  • Title

    1 V CMOS output stage with excellent linearity

  • Author

    Aloisi, W. ; Giustolisi, G. ; Palumbo, G.

  • Author_Institution
    Dipt. Elettrico, Elettronico e Sistemistico, Catania Univ., Italy
  • Volume
    38
  • Issue
    22
  • fYear
    2002
  • fDate
    10/24/2002 12:00:00 AM
  • Firstpage
    1299
  • Lastpage
    1300
  • Abstract
    A CMOS low-voltage output stage based on a push-pull topology is proposed. It is driven by a differential signal and its symmetric topology provides excellent intrinsic linearity. It can work with a power supply as low as 1 V and when loaded with a 500 Ω resistor it exhibits negligible even harmonic components whilst odd components are maintained well below -20 dB up to 900 mVpp of the output signal. Moreover, the output stage includes a simple current control which accurately sets the bias condition.
  • Keywords
    CMOS analogue integrated circuits; feedback amplifiers; low-power electronics; operational amplifiers; power amplifiers; 1 V; CMOS output stage; SPECTRE; bias current control; circuit simulations; common-mode feedback circuit; differential signal; driver circuit; harmonic components; high-drive capability; high-swing capability; low power supply; low-voltage output stage; power operational amplifier; push-pull topology; symmetric topology;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20020927
  • Filename
    1047057
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=864731