• DocumentCode
    864968
  • Title

    Diverge-Merge Processor: Generalized and Energy-Efficient Dynamic Predication

  • Author

    Kim, Hyesoon ; Joao, Jose A. ; Mutlu, Onur ; Patt, Yale N.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX
  • Volume
    27
  • Issue
    1
  • fYear
    2007
  • Firstpage
    94
  • Lastpage
    104
  • Abstract
    The branch misprediction penalty is a major performance limiter and a major cause of wasted energy in high-performance processors. The diverge-merge processor reduces this penalty by dynamically predicating a wide range of hard-to-predict branches at runtime in an energy-efficient way that doesn´t significantly increase hardware complexity or require major ISA changes
  • Keywords
    microprocessor chips; parallel architectures; program compilers; branch misprediction penalty; diverge-merge processor; energy-efficient dynamic predication; hardware complexity; high-performance processor; Clocks; Energy efficiency; Frequency; Hardware; Instruction sets; Parallel processing; Pipeline processing; Registers; Runtime; adaptivity; branch prediction; dynamic predication; energy efficiency; instruction level parallelism; pipelining; predication;
  • fLanguage
    English
  • Journal_Title
    Micro, IEEE
  • Publisher
    ieee
  • ISSN
    0272-1732
  • Type

    jour

  • DOI
    10.1109/MM.2007.9
  • Filename
    4205128