Title :
An integrated environment for technology closure of deep-submicron IC designs
Author :
Trevillyan, Louise ; Kung, David ; Puri, Ruchir ; Reddy, Lakshmi N. ; Kazda, Michael A.
Author_Institution :
IBM Thomas J. Watson Res. Center, NY, USA
Abstract :
With larger chip images and increasingly aggressive technologies, key design processes must interoperate, PDS, a physical-synthesis system, accomplishes technology closure through interacting processes of logic optimization, placement, timing, clock insertion, and routing, all using a common infrastructure with robust variable-accuracy analysis abstractions.
Keywords :
VLSI; circuit analysis computing; circuit optimisation; clocks; integrated circuit design; VLSI; clock insertion; deep-submicron IC designs; key design process; logic optimization; physical-synthesis system; timing; variable-accuracy analysis abstractions; Clocks; Delay; Logic; Process design; Repeaters; Routing; Steiner trees; Testing; Timing; Wire;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2004.1261846
