Theoretical Investigation of Dual Material Junctionless Double Gate Transistor for Analog and Digital Performance

Author

Kumari, Vandana ; Modi, Neel ; Saxena, Manoj ; Gupta, Mridula

Author_Institution

Dept. of Electron. ScienceSemiconductor Device Res. Lab., Univ. of Delhi, New Delhi, India

Volume

62

Issue

7

fYear

2015

fDate

Jul-15

Firstpage

2098

Lastpage

2105

Abstract

In this paper, we report the 2-D drain current model for asymmetric dual material (DM) junctionless double gate transistor. On the basis of channel potential, transconductance and its higher order derivatives are estimated and verified with the ATLAS 3-D device simulator results. The developed model is also applicable to investigate the digital performance of the device in terms of voltage transfer characteristics of nMOS inverter circuit. The impact of the length of control gate on the analog performance has also been investigated. Results also highlight the advantage of DM gate over the single material gate for digital and analog applications using CMOS inverter and common source amplifier through exhaustive circuit simulation.

Keywords

CMOS integrated circuits; MOSFET; logic gates; 2-D drain current model; ATLAS 3-D device simulator; CMOS inverter; DM gate; analog performance; channel potential; common source amplifier; complementary metal oxide semiconductor; control gate; digital performance; dual material junctionless double gate transistor; nMOS inverter circuit; transconductance; voltage transfer characteristic; Analytical models; Electric potential; Leakage currents; Logic gates; Metals; Performance evaluation; Transistors; ATLAS; double gate; dual material gate (DMG); junctionless; modeling; modeling.;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2015.2433951

Filename

7116533