DocumentCode :
866442
Title :
Noise margins in digital integrated circuits
Author :
Luecke, Gerald
Author_Institution :
Texas Instruments, Inc., Dallas, Tex.
Volume :
52
Issue :
12
fYear :
1964
Firstpage :
1565
Lastpage :
1571
Abstract :
Many integrated circuit logic gates, especially the complete monolithic type, operate at very low signal levels. For this reason, the sensitivity of such circuits to noise is very important. The general definition of noise margin leads to a discussion of dc and ac noise margins for a simple inverting gate, and specific test data of an RCTL gate. A standard definition for input ac noise margin for a simple logic gate is proposed.
Keywords :
Circuit noise; Circuit testing; Digital integrated circuits; Feeds; Integrated circuit noise; Logic circuits; Logic gates; Low voltage; Monolithic integrated circuits; Pulse inverters;
fLanguage :
English
Journal_Title :
Proceedings of the IEEE
Publisher :
ieee
ISSN :
0018-9219
Type :
jour
DOI :
10.1109/PROC.1964.3445
Filename :
1445375
Link To Document :
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