DocumentCode
866630
Title
Some new packaging schemes for integrated circuits
Author
Lampathakis, R.E.
Author_Institution
Motorola, Inc., Phoenix, Ariz.
Volume
52
Issue
12
fYear
1964
Firstpage
1651
Lastpage
1654
Abstract
This paper investigates interconnection schemes based on multilayer printed wiring techniques necessitated by the development and the subsequent introduction of integrated circuits into the systems technology. The integrated circuits used in the particular scheme discussed and illustrated in this paper are current mode fast digital circuits packaged in the familiar TO-5, 10-pin device package. But similar designs exist for other device packages such as the ceramic flat package. The design of the interconnection scheme evolves around a predesigned TO-5, 10-pin package matrix with sandwiched voltage planes (one layer per voltage) and with all the logic signal interconnection lines on the two outside sides of the multilayer printed circuit board.
Keywords
Ceramics; Digital circuits; Digital integrated circuits; Integrated circuit interconnections; Integrated circuit packaging; Integrated circuit technology; Nonhomogeneous media; Signal design; Voltage; Wiring;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/PROC.1964.3462
Filename
1445392
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