Title :
High Throughput Stochastic Log-MAP Turbo-Decoder Based on Low Bits Computation
Author :
Jienan Chen ; Jianhao Hu
Author_Institution :
Nat. Key Lab. of Sci. & Technol. on Commun., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Abstract :
In this letter, we propose a high throughput stochastic Low Bits Computation (LBC) turbo decoder. We represent the signal by a 3-bits width stochastic stream, which improves the accuracy of stochastic computation significantly. We have designed and synthesized our design based on CMOS 90 nm technology. The report shows that the proposed decoder can achieve 4.0 Gbps with 7.1 M gate count to decode a 2048-length R=1/3 turbo code, when the bit error rate (BER) is 10-5 @ Eb/N0=1.25 dB.
Keywords :
CMOS integrated circuits; error statistics; maximum likelihood decoding; stochastic processes; turbo codes; BER; CMOS technology; LBC turbo decoder; bit error rate; gate count; high throughput stochastic log-MAP turbo-decoder; high throughput stochastic low bits computation; size 90 nm; stochastic computation; stochastic stream; word length 3 bit; Accuracy; Algorithm design and analysis; Bit error rate; Decoding; Logic gates; Measurement; Throughput; High throughput; stochastic computation; turbo decoder;
Journal_Title :
Signal Processing Letters, IEEE
DOI :
10.1109/LSP.2013.2278853
