Characteristics of Bloch line memory with major/minor-loop structure

The characteristics of the functions of a vertical Bloch line memory (VBL) with major/minor-loop structure and field access scheme, except for the detector, were investigated. The memory is composed of a major line with two-level conductor patterns, minor loops utilizing stabilized ring-shaped domains, and read/write gates with three-level conductor patterns. Bubbles generated at the bubble generator are propagated on the major line with greater than 4-mA drive current at 500-kHz frequency. Stretching of the ring-shaped domain head is well controlled by the presence or absence of a bubble in the major line. The round propagation for a VBL pair is achieved quasi-statically by a pulsed bias field with 6.5-Oe potential barrier for a 4.0-μm-period track. Bias-field margins of 8.5 Oe for the minor loop and 13 Oe for the major line were obtained, verifying the feasibility of this device