DocumentCode
867117
Title
Design and Performance of Two 1k CMOS/SOS Hardened RAMs
Author
Brucker, G.J. ; Caracciolo, G.T. ; Gehweiler, W.F. ; Heagerty, W.F.
Author_Institution
RCA Advanced Technology Laboratories Government Systems Division Camden, New Jersey 08102
Volume
30
Issue
3
fYear
1983
fDate
6/1/1983 12:00:00 AM
Firstpage
1920
Lastpage
1925
Abstract
RCA is under contract to DoD to develop two 5V 1K CMOS/SOS RAMs capable of meeting stringent total dose and transient radiation levels. This paper presents the design, operation, characterization, and test results of the RAMs´ capabilities to meet these radiation levels. The radiation resistance of these circuits is enhanced through design by dominant PMOS utilization, the exclusion of source followers, and tolerance to large threshold voltage shifts. Test results on further enhancement through radiation hardened processing are presented. This effort demonstrates a factor of 5 to 10 improvement in circuit radiation hardness by consideration of technology radiation characteristics in the design phase. Hardened processing can extend the performance of these parts to total dose environments in excess of 500K rads making them useful in extended space missions and severe military environments.
Keywords
CMOS technology; Circuit testing; Contracts; Latches; MOS devices; Phased arrays; Radiation hardening; Random access memory; Read-write memory; Threshold voltage;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1983.4332673
Filename
4332673
Link To Document