• DocumentCode
    867285
  • Title

    A memory-efficient and high-speed sine/cosine generator based on parallel CORDIC rotations

  • Author

    Hsiao, Shen-Fu ; Hu, Yu-Hen ; Juang, Tso-Bing

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Nat. Sun Yat-sen Univ., Kaohsiung, Taiwan
  • Volume
    11
  • Issue
    2
  • fYear
    2004
  • Firstpage
    152
  • Lastpage
    155
  • Abstract
    The sine/cosine function generator is based on parallelization of the original CORDIC algorithm by predicting all the rotation directions directly from the binary bits of the initial input angle. Unlike previous approaches that require complicated circuits or exponentially increased ROM, our proposed architecture has a relatively simple prediction scheme through an efficient angle recoding. The critical path delay is also reduced by utilizing the predicted rotation directions to design an efficient multioperand carry-save addition structure.
  • Keywords
    carry logic; direct digital synthesis; field programmable gate arrays; function generators; parallel architectures; signal processing; binary bits; function generator; high-speed cosine generator; memory-efficient sine generator; microrotation angle recoding; multioperand carry-save addition structure; parallel CORDIC rotations; prediction scheme; Arithmetic; Circuits; Computer science; Delay; Equations; Error correction; Frequency; Prediction algorithms; Read only memory; Signal generators;
  • fLanguage
    English
  • Journal_Title
    Signal Processing Letters, IEEE
  • Publisher
    ieee
  • ISSN
    1070-9908
  • Type

    jour

  • DOI
    10.1109/LSP.2003.821705
  • Filename
    1261966