The Temperature Dependence of Mismatch in Deep-Submicrometer Bulk MOSFETs

We present a study of the temperature dependence of transistor mismatch in a 65-nm CMOS platform over a temperature range of 0degC to 125degC. We show that the relative-drain-current-mismatch fluctuation properties improve marginally in strong inversion, while they are strongly affected in the subthreshold region. This is compared and explained with a commonly used model. Furthermore, we analyze the change over temperature of the I_ON mismatch of individual matched pairs. This analysis shows, for the first time, that although relative-current-mismatch fluctuation standard deviations estimated on whole populations are reduced at higher temperatures, the current mismatch of individual pairs can change substantially over temperature.