Title :
Circuit design for a high-T/sub c/ Josephson sampler
Author :
Hidaka, M. ; Tsai, J.S.
Author_Institution :
Fundamental Res. Labs., NEC Corp., Tsukuba, Japan
fDate :
6/1/1995 12:00:00 AM
Abstract :
We propose a high-speed and high-sensitivity sampler circuit using high T/sub c/ superconducting (HTS) Josephson junctions. This circuit consists of five non-latching junctions, superconducting lines and a superconducting ground-plane. A main feature of this circuit is a non-latching comparator junction whose switching generates a circulating current in a superconducting loop. Computer simulation and prototype layout were performed to study its ability and feasibility.<>
Keywords :
high-temperature superconductors; signal sampling; superconducting integrated circuits; circuit design; computer simulation; high T/sub c/ superconducting Josephson junctions; high-speed high-sensitivity sampler; layout; nonlatching comparator junction; superconducting ground-plane; superconducting lines; superconducting loop; Circuit simulation; Circuit synthesis; Computational modeling; Critical current; High temperature superconductors; Inductance; Josephson junctions; Pulse circuits; Switches; Turning;
Journal_Title :
Applied Superconductivity, IEEE Transactions on
