DocumentCode :
869614
Title :
A 3.125-Gbit/s Parallel Optical Receiver in 0.13-μm CMOS With Direct Crosstalk Power Penalty Measurement Capability
Author :
Tang, Wei ; Plant, David V.
Author_Institution :
Electr. & Comput. Eng. Dept., McGill Univ., Montreal, Que.
Volume :
53
Issue :
12
fYear :
2006
Firstpage :
1426
Lastpage :
1430
Abstract :
We introduce a new method to measure the crosstalk power penalty in an arrayed environment by using an on-chip pseudorandom-bit-sequence generator to drive the aggressors. The proposed method is implemented in a three-channel 3.125-Gbit/s/ ch parallel receiver. Experimental results are presented including measurements of bit-error rate and crosstalk power penalty for 2.5and 3.125-Gbit/s operations. The measured crosstalk power penalty is less than 1 dB at both data rates. The test chip was designed in a standard 0.13-mum CMOS process
Keywords :
CMOS integrated circuits; crosstalk; error statistics; optical interconnections; optical receivers; random number generation; 0.13 micron; 2.5 Gbit/s; 3.125 Gbit/s; CMOS process; bit-error rate; crosstalk power penalty measurement; parallel optical interconnects; parallel optical receiver; pseudorandom-bit-sequence generator; Circuit testing; Optical arrays; Optical crosstalk; Optical interconnections; Optical receivers; Power measurement; Semiconductor device measurement; System-on-a-chip; Transceivers; Vertical cavity surface emitting lasers; 0.13- $mu{hbox {m}}$ CMOS; Crosstalk; parallel optical interconnects (POI); transimpedance amplifier (TIA); truly differential;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-7747
Type :
jour
DOI :
10.1109/TCSII.2006.886054
Filename :
4033169
Link To Document :
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