Charge Collection and Charge Sharing in a 130 nm CMOS Technology

Author

Amusan, Oluwole A. ; Witulski, Arthur F. ; Massengill, Lloyd W. ; Bhuva, Bharat L. ; Fleming, Patrick R. ; Alles, Michael L. ; Sternberg, Andrew L. ; Black, Jeffrey D. ; Schrimpf, Ronald D.

Author_Institution

Vanderbilt Univ., Nashville, TN

Volume

53

Issue

6

fYear

2006

Firstpage

3253

Lastpage

3258

Abstract

Charge sharing between adjacent devices can lead to increased Single Event Upset (SEU) vulnerability. Key parameters affecting charge sharing are examined, and relative collected charge at the hit node and adjacent nodes are quantified. Results show that for a twin-well CMOS process, PMOS charge sharing can be effectively mitigated with the use of contacted guard-ring, whereas a combination of contacted guard-ring, nodal separation, and interdigitation is required to mitigate the NMOS charge sharing effect for the technology studied

Keywords

CMOS digital integrated circuits; bipolar transistors; semiconductor device models; NMOS charge sharing; PMOS charge sharing; SEU; charge collection; device simulation; digital circuits; guard-band; guard-ring; interdigitation; lateral parasitic bipolar transistor; nodal separation; single event upset; twin-well CMOS process; Bipolar transistors; CMOS digital integrated circuits; CMOS logic circuits; CMOS process; CMOS technology; Helium; MOS devices; P-n junctions; Single event upset; Voltage; Charge sharing; guard-band; interdigitation; lateral parasitic bipolar; single event upset;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2006.884788

Filename

4033184