Spread-vertical-capacitor cell (SVC) for high-density dRAM´s

Author

Matsuo, Naoto ; Nakata, Yoshiro ; Ogawa, Hisashi ; Yabu, Toshiki ; Matsumoto, Susumu ; Sagago, M. ; Hashimoto, Kazuhiko ; Okada, Shozo

Author_Institution

Matsushita Electric Ind. Co. Ltd., Osaka, Japan

Volume

40

Issue

4

fYear

1993

fDate

4/1/1993 12:00:00 AM

Firstpage

750

Lastpage

754

Abstract

An advanced three-dimensionally (3-D) stacked-capacitor cell, the spread-vertical-capacitor cell (SVC), was developed. SVC realized a storage capacitance (C_s) of 30 fF with a cell area of 1.8 μm², a capacitor height of 0.37 μm, and an equivalent SiO₂ film thickness of 7 nm for oxide-nitride-oxide (ONO). By extrapolating these results to 256-Mb DRAMs, a C_s of 24 fF is obtained with a cell area of 0.5 μm², a capacitor height of 0.4 μm, and an equivalent SiO₂ thickness of 5 nm, and these values satisfy the specifications for 256-Mb DRAMs. The low capacitor height of SVC makes possible a fabrication process using ArF excimer laser lithography

Keywords

DRAM chips; MOS integrated circuits; VLSI; capacitors; 193 nm; 256 Mbit; 30 to 24 fF; 7 to 5 nm; ArF excimer laser lithography; DRAMs; ONO film; VLSI; capacitor height; cell area; equivalent SiO₂ film thickness; possible a fabrication process; spread-vertical-capacitor cell; stacked-capacitor cell; storage capacitance; Anisotropic magnetoresistance; Capacitance; Capacitors; Dry etching; Electrodes; Hafnium; Lithography; Optical device fabrication; Random access memory; Static VAr compensators;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.202787

Filename

202787