Analytic accounting for carrier velocity overshoot in advanced BJT´s for circuit simulation

Author

Jin, Joohyun ; Fossum, Jerry G.

Author_Institution

Dept. of Electr. Eng., Florida Univ., Gainesville, FL, USA

Volume

40

Issue

4

fYear

1993

fDate

4/1/1993 12:00:00 AM

Firstpage

789

Lastpage

795

Abstract

An analytic model for electron velocity overshoot in advanced silicon-based bipolar junction transistors (BJTs) is presented. The model, which characterizes an effective saturated drift velocity in the collector space-charge regions, is intended for circuit simulation and has been implemented in MMSPICE. The model is based on a nonlocal augmented drift-velocity formalism that involves a length coefficient derived from Monte Carlo simulations. A phenomenological representation of the associated velocity relaxation is defined to be consistent with the overshoot analysis. Demonstrative MMSPICE device and circuit simulations show that effects of velocity overshoot in contemporary silicon BJTs produce only small performance enhancements, but can be exploited to optimize design tradeoffs in scaled technologies

Keywords

SPICE; bipolar transistors; semiconductor device models; BJT; MMSPICE; Monte Carlo simulations; analytic model; bipolar junction transistors; carrier velocity overshoot; circuit simulation; collector space-charge regions; design tradeoffs; device simulation; electron velocity overshoot; length coefficient; nonlocal augmented drift-velocity formalism; overshoot analysis; performance enhancements; phenomenological representation; saturated drift velocity; scaled technologies; scaling; velocity relaxation; Analytical models; Circuit simulation; Computational modeling; Design optimization; Electron mobility; Equations; Kinetic theory; MESFETs; Silicon; Velocity control;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.202792

Filename

202792